growthroles

ASIC Implementation Specialist

IMC Open · verified Oct 21, 2026
Amsterdam Mid-level Solutions & Sales Engineering

At a glance

Mid-level Solutions & Sales Engineering role at IMC. Amsterdam · no salary stated · we estimate €66,500–€100,000 across the Netherlands.

Estimated pay

IMC has not published a salary for this role. The figure below is our estimate, not theirs.

€66,500 – €100,000
What the middle half of mid-level solutions & sales engineering roles in the Netherlands paid, among postings that did state a salary.
Worked out from 5 postings that stated pay, median €75,000. Last updated Oct 18, 2026.
RoleSolutions & Sales Engineering
SeniorityMid-level
LocationAmsterdam
PostedOct 19, 2026 · 2d ago
Role brief

growthroles summary, based on the employer's posting.

What you'll do

  • Carry ASIC blocks through back-end implementation, from synthesis and floorplanning through timing work and signoff
  • Set floorplans and power grids, deciding macro and pin placement, area budgets, and clock-tree approaches
  • Run static timing analysis, create and validate SDC constraints, and close timing on high-performance designs
  • Prepare designs for signoff with power-integrity checks, physical verification, logic-equivalence checks, and ECOs
  • Improve implementation flows with automation, and work with RTL, DFT, packaging, and foundry teams to refine designs

What you bring

  • A bachelor’s or master’s degree in electrical or computer engineering, plus at least seven years in ASIC implementation
  • Multiple completed tapeouts and strong practical experience across physical implementation and signoff
  • Hands-on use of Cadence and Siemens tools for implementation and signoff
  • Knowledge of CMOS, RC parasitic extraction, physical-design formats and constraints, and low-power design flows
  • Experience with advanced FinFET processes and awareness of DFT

Who this fits

This mid-level role suits an experienced ASIC implementation specialist who can own blocks through signoff and contribute across overlapping research and production projects. The position is based in Amsterdam, Netherlands.

From the employer

As an ASIC Implementation Specialist in our Global Hardware R&D team, you’ll help expand IMC’s ASIC capabilities, building on our existing technology to accelerate time-to-market.

You’ll work on greenfield projects spanning cutting-edge research and production-scale implementations, with multiple overlapping projects each year. This is an opportunity to help shape the future of ASICs at IMC and contribute to technology that will support our trading systems over the next decade.

Your Core Responsibilities:

  • Take ownership of blocks throughout the RTL-to-GDSII back-end flow: synthesis, floorplanning, clock-tree synthesis, timing optimization and signoff.
  • Design floorplans and power grids, making key decisions around macro and pin placement, area budgeting and clock-tree optimization.
  • Drive STA and timing closure for high-performance designs, developing and validating the SDC constraints needed to achieve design goals.
  • Ensure designs are ready for signoff through power integrity analysis, physical verification, logic equivalence checking and ECOs.
  • Shape and improve implementation flows around design needs, building automation and scripts that support efficient execution.
  • Work closely with RTL design, DFT, packaging and foundry teams, using physical implementation insights to influence and improve RTL.
  • Share your expertise through design reviews and clear documentation.

Your Skills and Experience:

Required Experience:

  • BS/MS in Electrical or Computer Engineering, with 7+ years of ASIC implementation experience and multiple successful tapeouts.
  • Strong experience across physical implementation and signoff, including floorplanning, clock-tree synthesis, STA, timing closure and physical verification.
  • Hands-on experience with Cadence and Siemens implementation and signoff tools.
  • Strong understanding of CMOS, RC-parasitic extraction and key physical design formats and constraints.
  • Experience with low-power design flow.
  • DFT awareness.
  • Advanced FinFET nodes experience (16/12/7/5).

Preferred Experience:

  • Experience with custom macro integration.
  • Knowledge of package/PCB co-design, chiplet or 2.5D/3D integration.
  • Exposure to machine-learning-driven implementation flows.
  • RTL coding ability and functional verification experience.
  • Synthesis and DFT experience.

About Us

IMC is a research-driven trading firm where quantitative modeling, machine learning, and engineering shape how modern markets are traded. A stabilizing force in markets since 1989, we provide liquidity across trading venues, delivering the best outcome in value and risk management to investors. Using our own technology and capital, we build proprietary systems and algorithms that operate across global markets. Our researchers, traders, and engineers work as a collective, combining rapid experimentation, advanced infrastructure, and real-time feedback to turn insight into execution and execution into advantage.

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